Owing to the multiple functions and reduced size and thickness of recent electronic apparatuses, the size and thickness of semiconductor devices have been increasingly reduced, and the number of terminals on the semiconductor devices tends to increase. One known type of semiconductor device appropriate for this situation is what is called a BGA (Ball Grid Array) package from which laterally projecting external leads as used in a conventional QFP (Quad Flat Package) are omitted but which has solder balls arranged on a bottom surface of the semiconductor device in a matrix as external electrodes for electric connections, or an LGA (Land Grid Array) package having external electrodes arranged in a matrix, or a QFN (Quad Flat Non-lead) package having external electrodes arranged on the bottom surface of the semiconductor device peripherally to one another.
If a semiconductor element generating a large quantity of heat is mounted in such a resin molding (BGA, LGA, QFN, or the like) semiconductor device, the semiconductor device needs to be designed with the radiation property thereof taken into account. Japanese Patent Laid-Open No. 8-139223 discloses a semiconductor device having a structure shown below.
Now, the conventional semiconductor device disclosed in Japanese Patent Laid-Open No. 8-139223 will be described with reference to relevant drawings.
FIG. 12 is a sectional view of the conventional semiconductor device. FIG. 13 is a perspective view of a thermal conductor in the semiconductor device in FIG. 12.
As shown in FIGS. 12 and 13, the conventional semiconductor device 100 is made up of an insulating resin and composed of a substrate 3 having wiring patterns 2 formed on opposite surfaces thereof and electrically connected together via via holes 7, a semiconductor element 1 mounted on a major surface (semiconductor element mounting surface) of the substrate 3 via an adhesive 4, thin metal wires 5 electrically connecting the semiconductor element 1 to the wiring patterns 2 on the substrate 3, ball electrodes 8 arranged in a matrix on a surface of the substrate 3 which is opposite the semiconductor element 1 mounting surface, the ball electrodes 8 being electrically connected to the wiring patterns 2 on the substrate 3, and a thermal conductor 9 which covers the semiconductor element 1 mounting surface side of the substrate 3 and the semiconductor element 1, all or a part of a top surface of the thermal conductor 9 being exposed from a mold resin member 6 to the exterior. The thermal conductor 9 may be placed in abutment with the substrate 3 and secured thereto with an adhesive (not shown) or the like or may be disposed in abutment with the substrate 3 without being secured thereto.
The thermal conductor 9 is made up of a material with a high thermal conductance such as Cu, Cu alloy, Al, Al alloy, or Fe—Ni alloy The thermal conductor 9 has a plurality of openings 10 formed in an inclined portion 9a located close to an outer periphery thereof.
In the configuration of the semiconductor device 100, heat generated by the semiconductor element 1 is dissipated through the via holes 7 and the ball electrodes 8 and also from the major surface (the top surface in FIG. 12) of the semiconductor element 1 via the thermal conductor 9. The semiconductor device 100 thus exhibits an excellent radiation property.
Furthermore, by providing, for example, a heat sink (not shown), on the top surface of the portion of the thermal conductor 9 exposed from the molding resin member 6, it is possible to further enhance the effect of heat radiation from the major surface of the semiconductor element 1.
Moreover, since the plurality of openings 10 are formed in the inclined portion 9a of the thermal conductor 9, resin can be easily injected into the gap between the thermal conductor 9 and the semiconductor element 1 in the case of resin molding. A resin injecting capability is thus improved.
Now, description will be given of a conventional method of manufacturing a semiconductor device.
As shown in FIG. 14A, the substrate 3 with the wiring patterns 2 formed on the both surfaces is provided. As shown in FIG. 14B, the semiconductor element 1 is fixed and mounted on a top surface of the substrate 3 at bonding positions with an adhesive 4.
Then, as shown in FIG. 14C, electrode pads (not shown) on the semiconductor element 1 mounted on the substrate 3 are electrically connected, by the thin metal wires 5, to the wiring patterns 2, provided on the top surface of the substrate 3.
Then, as shown in FIG. 14D, the thermal conductor 9 is brought into abutment with the substrate 3 so as to cover the semiconductor element 1. The thermal conductor 9 and the substrate 3 may be secured to each other at the abutting portion with the adhesive (not shown) or the like or only brought into abutment with each other without being secured to each other. Here, the thermal conductor 9 is obtained by subjecting a substantially rectangular plate to drawing or the like and providing a prismatic portion in the center of the plate such that the top of the prismatic portion is exposed from the mold resin member 6 and shaped like a cap covering the whole semiconductor element 1 as shown in FIGS. 12 and 13. The openings 10 are formed in the inclined portion 9a close to the outer periphery of the thermal conductor 9.
Then, as shown in FIG. 14E, the semiconductor element 1 is mounted on and electrically connected to the substrate 3 via the thin metal wires 5. The substrate 3 against which the thermal conductor 9 abuts is set on a lower die 21A of a molding die 21 and molded by an upper die 21B of the molding die 21. At this time, a bottom surface of the upper die 21B of the molding die 21 contacts the top surface of the thermal conductor 9. In this condition, the mold resin member 6 is injected through an injection gate 21 in an injection direction 22s; the injection gate 21 is formed in the upper die 21B of the molding die 21 in a horizontal direction. As a result, the gap on the top surface of the substrate 3 is covered with the mold resin member 6, whereas the top surface of the thermal conductor 9 is exposed from the mold resin member 6 to the exterior. Then, after the molding resin 6 is cured, the upper die 21B and lower die 21A of the molding die 21 are opened.
Then, as shown in FIG. 14F, the substrate 3 with the top surface thereof molded by the mold resin member 6 is cut into semiconductor chips using a rotating blade (not shown).
Finally, the solder balls are attached to the external pad electrodes on a bottom surface of the substrate 3 to form the ball electrodes 8, which constitute external terminals. The semiconductor device 100 as shown in FIG. 12 can thus be manufactured.
The conventional semiconductor device 100 ensures the radiation property because the top surface of the thermal conductor 9 is exposed from the mold resin member 6. However, in the process of resin molding, owing to the use of a scheme (hereinafter referred to as a side gate scheme) according to which the resin is injected through the injection gate 21s, formed in a side surface of the semiconductor device 100, the thin metal wires S may be deformed as shown in FIG. 15C.
FIG. 15A is a sectional view of the side gate scheme showing a state immediately before resin molding; the sectional view is taken along an alternate long and short dash line A-A shown in FIGS. 15B and 15C. FIG. 15B is a plan view showing the shape of the thin metal wires 5 observed before resin injection. FIG. 15C is a plan view showing the shape of the thin metal wires 5 and the flow pattern of the resin observed after the resin injection.
As shown in FIG. 15C, the resin injected through the injection gate 21s in the injection direction 22s is injected so as to create ripples around the injection gate 21s. Here, dotted lines 6a each show a position reached by the resin at the same time.
The amount by which the thin metal wire 5 is deformed is proportional to the “viscosity of the resin”, the “flow speed of the resin”, the “angle of leading end of the resin flow to the thin metal wire”, and the like. As shown in FIG. 15B, the thin metal wires 5 extend radially from the center of the major surface of the semiconductor element 1. Thus, as shown in FIG. 15C, after the resin injection is completed, the thin metal wires 5 located close to the injection gate 21s or at a very small angle to the leading end of the flow located opposite the injection gate are not substantially deformed. However, the other thin metal wires 5 are deformed according to “the flow speed of the resin”, the “angle of leading end of the resin flow to the thin metal wire”, and the like.
Therefore, for the semiconductor device with the thin metal wires 5 densely arranged as a result of the reduced size of the device and the increased number of terminals, the resin molding based on the conventional side gate scheme may disadvantageously cause the adjacent thin metal wires 5 with a short distance therebetween to be deformed and short-circuited.
To prevent the planar deformation of the thin metal wires 5, a scheme (hereinafter referred to as a top gate scheme) may be adopted according to which the resin is injected through an injection gate 21t formed so as to open in the top surface of the semiconductor device, as shown in FIG. 16A to 16C.
FIG. 16A is a sectional view of the top gate scheme; the sectional view is taken along alternate long and short dash line B-B shown in FIGS. 16B and 16C. FIG. 16B is a plan view showing the shape of the thin metal wires 5 observed before the resin injection. FIG. 16C is a plan view showing the shape of the thin metal wires 5 and the injection pattern of the resin observed after the resin injection.
As shown in FIG. 16C, the resin injected through the injection gate 21t in an injection direction 22t is injected so as to create ripples around the injection gate 21t. Here, the dotted lines 6a each show the position reached by the resin at the same time.
When the injection gate 21t is located above the center of the semiconductor element 1, all the thin metal wires 5 extending radially from the center of the semiconductor element 1 are located at a very small angle from the leading end of the flow. This prevents the thin metal wires 5 from being deformed, enabling high-quality semiconductor devices to be manufactured.
However, in the conventional semiconductor device 100, the thermal conductor 9 covers the entire top surface of the semiconductor element 1 and is exposed from the mold resin member 6 to the exterior This makes it difficult to locate the injection gate of the resin above the semiconductor element 1, preventing the adoption of the top gate scheme.
Furthermore, in the conventional semiconductor device 100, since the thermal conductor 9 is located to cover the entire surface of the semiconductor element 1, the thermal conductor 9 may obstruct the resin molding in spite of the presence of the openings 10. This may disadvantageously prevent the resin from being completely filled into the mold.